• Undergraduate projects advisor at HSDSL lab, VLSI lab, PSL lab


  • 044262 – Logic Design
  • 046853 – VLSI Architecture Design
  • 046262 – High Speed Digital Systems Design
  • Lab2/3 – Introduction to multi-core microprocessor
  • Lab2/3 – High speed communication protocols

Patent Applications/Provisional

  1. A. Berman, Y. Birk, “Device, method and computer readable program for accessing memory cells using shortened read attempts”, US61/507,616 pending.
  2. Y. Birk, A. Berman, “Mitigating inter-cell coupling effects in non-volatile memory (NVM) cells”, PCT/IB2011/053618, US61/374,281 pending.
  3. A. Berman, “Method of operating non-volatile memory”, US61/107,669 pending.
  4. I. Bloom, A. Berman, A. Rizel, “Tail signature ECC”, US60/980,518 pending.
  5. A. Berman, I. Bloom, “Distribution switch”, US60/980,515 pending.
  6. A. Berman, A. Lavan, “Error correction method and circuit for NVM”, US60/900,985 pending.